Non-volatile magnetic random access memory (MRAM) devices can replace volatile dynamic random access memory (DRAM) devices and static random access memory (SRAM) devices in some applications. MRAM devices use arrays of cells based on tunneling magneto-resistance (TMR), colossal magneto-resistance (CMR), and giant magneto-resistance (GMR) technology.
MRAM cells are typically structured around “data” and “reference” layers. The data layer includes a writeable or switchable magnetic material, and the reference layer includes a fixed magnetic material. A dielectric layer in between the two has greater or lesser resistance to electrical current depending on whether the magnetic fields from the sandwiching outer layers are canceling or reinforcing one another.
During a write operation, the magnetization of the data layer can be switched between two opposite states by applying an electro-magnetic field through a nearby wire loop. Thus binary information can be stored. The reference layer usually comprises a magnetic material in which the magnetization is pinned. A magnetic field applied to the data layer penetrates the reference layer with insufficient strength to switch the magnetization in the reference layer.
For example, in a TMR cell, the data layer and the reference layer are separated by a thin dielectric layer so that a tunneling junction is formed. The probability that electrons will be able to tunnel through the dielectric layer depends on the direction of the magnetization in the data layer relative to the direction of the magnetization in the reference layer. Therefore, the structure is “magneto-resistant” and information can be stored and retrieved by reading the magnitude of tunneling currents thereafter able to pass through the memory cell.
Magnetic memory devices usually comprise a large number of such magnetic memory cells arranged in rows and columns of an array. The magnetic memory cells are sandwiched between word and bit and word lines. For example, the magnetic memory cells of each row are connected by bit lines and the magnetic memory cells of each column are connected by word lines. The bit lines are suitable to carry the write current required to generate the magnetic field to switch the magnetic memory cells.
Read and write operations are performed selectively, that is one or more magnetic memory cells are selected for a read or write operation by selecting respective lines. For reliable operation of the device it is desirable to have consistent electrical read and write limits for all magnetic memory cells of the array.